Patent
1983-03-24
1985-10-15
James, Andrew J.
357 70, 357 68, H01L 2314, H01L 2348, H01L 2312
Patent
active
045477957
ABSTRACT:
An integrated circuit semiconductor chip or the like is packaged on a leadless chip carrier. The chip carrier comprises a substrate with an integral coplanar extension frangibly connected to one or more sides. Each such extension has a metallized conductive area forming a shorting bar, interconnecting at least some of the metallized conductive traces formed on the substrate. The extensions with the shorting bars remain attached to the substrate while the chip is being installed to prevent damage to the chip from electrostatic discharges. After chip installation is completed, the extensions are separated from the substrate, thereby removing the interconnections between the traces. In a preferred embodiment, a scoring line along the peripheral edge of the substrate provides the frangible connection to the extension, and the extension is provided with holes along the scoring line to allow side metallization of the substrate.
REFERENCES:
patent: 3483308 (1969-12-01), Wakely
patent: 3548494 (1970-12-01), Haring
patent: 3601522 (1971-08-01), Lynch
patent: 3641401 (1972-02-01), Lynch
patent: 3665592 (1972-05-01), Apospors
patent: 3820152 (1974-06-01), Booth
patent: 3999285 (1976-12-01), Lewis et al.
patent: 4141712 (1979-02-01), Rogers
patent: 4288841 (1981-09-01), Gogal
patent: 4362902 (1982-12-01), Grabbe
Becker William G.
Bourns Inc.
Clark Sheila V.
James Andrew J.
Klein Howard J.
LandOfFree
Leadless chip carrier with frangible shorting bars does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Leadless chip carrier with frangible shorting bars, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Leadless chip carrier with frangible shorting bars will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2432020