Semiconductor memory device of hierarchical bit-line architectur

Details Semiconductor memory device of hierarchical bit-line architectur Semiconductor memory device of hierarchical bit-line architectur

1998-11-30

1999-08-31

Tran, Andrew Q.

Static information storage and retrieval

Read/write circuit

Differential sensing

365149, 36523003, 365190, 365233, G11C 702

Patent

active

059462540

ABSTRACT:
This invention discloses a semiconductor memory device in which memory cells are arranged at all the intersecting points of word lines and bit lines. The bit lines have a hierarchical bit-line architecture constituted by pairs of segmented bit-lines and pairs of master bit-lines. The memory cells are arranged at all the intersecting points of the word lines and the pairs of segmented bit-lines. The pairs of master bit-lines are of the folded bit-line scheme. One of a first pair of segmented bit-lines is connected to one of a first pair of master bit-lines, and the other one of the first pair of segmented bit-lines is connected to one of a second pair of master bit-lines. One of a second pair of segmented bit-lines is connected to the other one of the second pair of master bit-lines included in a second block, and the other one of the second pair of segmented bit-lines is connected to the other one of the first pair of master bit-lines included in a first block. The other one of the first pair of master bit-lines is connected to one of the second pair of master bit-lines via a transfer gate.

REFERENCES:
patent: 5377151 (1994-12-01), Komuro
IEEE Journal of Solid-State Circuits, vol. 26, No. 4, Apr. 1991, pp. 473-478, "A Divided/Shared Bit-Line Sensing Scheme for ULSI DRAM Cores", Hidaka et al.

Affiliated with

Also associated with

Rating

Semiconductor memory device of hierarchical bit-line architectur does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device of hierarchical bit-line architectur, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device of hierarchical bit-line architectur will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2427971