Semiconductor device having a SOI structure with substrate bias

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257348, 257349, 257350, 257351, 257252, 257353, 257354, 257901, 438149, 438150, 438151, 438152, 438153, 438154, H01L 2904

Patent

active

059457120

ABSTRACT:
Disclosed is a semiconductor device having a silicon on insulator structure capable of achieving a high integration, and a manufacturing method of the same. The semiconductor device includes a semiconductor substrate having a silicon on insulator structure, in which a insulating layer and a semiconductor layer are formed on a semiconductor wafer in sequence. A gate insulating film and a gate are formed on the semiconductor layer. A first impurity diffusion region and a second impurity diffusion region are formed in the semiconductor layer at both sides of the gate. A intermediate insulating layer having a first contact hole for exposing a predetermined portion of the first impurity diffusion region and a second contact hole for exposing a predetermined portion of the second impurity diffusion region and a predetermined portion of the wafer, is formed on an overall surface of the substrate. A first interconnection layer is electrically connected with the first impurity diffusion region through the first contact hole, and a second interconnection layer is electrically connected with the second impurity diffusion region and the predetermined portion of the wafer through the second contact hole.

REFERENCES:
patent: 5315132 (1994-05-01), Yamazaki
patent: 5489792 (1996-02-01), Hu et al.
patent: 5604360 (1997-02-01), Zhang et al.

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