Semiconductor memory device and manufacturing method therefor

Details Semiconductor memory device and manufacturing method therefor Semiconductor memory device and manufacturing method therefor

1994-12-07

1999-08-31

Meier, Stephen D.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

H01L 27108, H01L 2976, H01L 2994, H01L 31119

Patent

active

059457031

ABSTRACT:
In a semiconductor memory device, a capacitor with a trench having a laterally expanded bottom part is provided, the area above the laterally expanded part being provided for a transistor and cell separation, this resulting in an increase in the degree of integration. This laterally expanded part is formed by etching a silicon oxide film which is sandwiched between a substrate and a silicon layer, and is obtained by forming a depression in a semiconductor substrate beforehand. A silicon layer or another semiconductor substrate is laminated by bonding to a semiconductor substrate such as this into which is formed a depression, a trench which extends to this depression being formed, and the required films being formed to obtain the desired trench capacitor. By forming an oxide film on all of or the depression part of the semiconductor substrate into which is formed the depression, it is possible to eliminate the influence of radiation, by improving insulation properties.

REFERENCES:
patent: 5332920 (1994-07-01), Nakagawa et al.
patent: 5336912 (1994-08-01), Ohtsuki
Database WPAT, Derwent Information Ltd., AN-92-081977/11, JP-4-113377, Apr. 14, 1992. Abstract Only.
Database WPAT, Derwent Information Ltd., AN-88-068031/10, JP-63-022803, Jan. 30, 1988. Abstract Only.
Database WPAT, Derwent Information Ltd., AN-88-289132/41, JP-63-211383, Sep. 2, 1988. Abstract Only.
Database JAPIO, Japan Patent Information Organization, AN-90-203563, JP-2-203563, Aug. 13, 1990.
Database JAPIO, Japan Patent Information Organization, AN-89-237457, JP-1-237457, Sep. 21, 1989.

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