Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1997-04-29
1999-05-11
Tsai, Jey
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438672, 438634, 148DIG20, H01L21/44
Patent
active
059021322
ABSTRACT:
A relatively easy manufacturing method of a semiconductor device enabling a contact hole 25 to be formed reliably by self alignment without exposing a gate 11, wherein a plug 20 is adopted to protect an etching stopper film 16 from an etching gas when a preliminary opening 24 is formed by etching an insulating film 22 having an electrical insulating etching stopper film 16 embedded therein.
REFERENCES:
patent: 4997790 (1991-03-01), Woo et al.
patent: 5705427 (1998-01-01), Chan et al.
K.H. Kusters et al., "A High Density 4Mbit dRAM Process Using a Fully Overlapping Bitline Contact (FoBIC) Trench Cell", 1987, pp. 93-94.
Frank Robert J.
OKI Electric Industry Co., Ltd.
Tsai Jey
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