Smart boost circuit for low voltage flash EPROM

Details Smart boost circuit for low voltage flash EPROM Smart boost circuit for low voltage flash EPROM

1995-11-21

1997-07-08

Zarabian, A.

Static information storage and retrieval

Read/write circuit

Including reference or bias voltage generator

36518907, G11C 1140

Patent

active

056468946

ABSTRACT:
The circuit of this invention improves significantly the programming speed of a Flash EPROM. The circuit includes a detector circuit (DC) using a pre-charge capacitor (C1), capacitor dividers [(C1/(C1+C2) and C3/(C2+C3)] and a voltage comparator (COMP) to signal a control logic circuit (CLC) when the programming voltage is within supply voltage (V.sub.cc) of its final value. At that point the control logic circuit (CLC) boosts the voltage on one terminal of a boost capacitor (BC) by the value of the supply voltage (V.sub.cc). The other terminal (XDD) of the boost capacitor (BC) furnishes the boosted programming voltage for the Flash EPROM.

REFERENCES:
patent: 5075572 (1991-12-01), Poteet
patent: 5446697 (1995-08-01), Yoo

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