Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Patent
1998-10-08
1999-12-28
Chaudhuri, Olik
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
438124, 438112, 438127, H01L 2144, H01L 2156
Patent
active
060080736
ABSTRACT:
A semiconductor device package is formed with a lead frame including a plurality of lead members positioned in an array on a first plane along a vertical or z-axis. A die paddle is attached to the lead frame adjacent to the lead members, and a semiconductor die having a plurality of bond pads is secured to the die paddle. A bus bar is provided on the lead frame, with the bus bar positioned between the lead members and the die paddle. A section of the bus bar passing by the lead members is offset from the first plane along the vertical axis. A plurality of connection members such as bonding wires traverses over the offset section of the bus bar to electrically couple the lead members to the semiconductor die. Other connection members electrically couple the offset section of the bus bar to the semiconductor die. The connection members coupled to the bus bar have a steeper incline than the connection members coupled to the lead members. The offset section of the bus bar provides additional clearance for bonding wires passing thereover, thus minimizing the possibility of wires shorting to the bus bar.
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Corisis David J.
King Jerrold L.
Chambliss Alonzo
Chaudhuri Olik
Micron Technology
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