Semiconductor memory device

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257306, 257530, H01L 2978

Patent

active

055679625

ABSTRACT:
A semiconductor memory device includes: an insulated gate transistor having a plurality of main electrode regions provided along a major surface of a substrate and a channel region provided between the plurality of main electrode regions, and a gate electrode provided on the channel region with a gate insulator therebetween, the gate electrode having at least two opposing portions; and an electrically breakable memory element provided on one of the main electrode regions.

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Sato, Noriaki, "A New Programmable Cell Utilizing Insulator Breakdown" IEDM 85, pp. 639-642.
IEDM Technical Digest, International Electron Devices Meeting, San Francisco, Calif., Dec. 11-14, 1988, "High Performance CMOS Surrounding Gate Transistor (SGT) For Ultra High Density LSIs", Takato, et al., pp. 222-225.
Patent Abstracts of Japan, vol. 14, No. 156 (E-908) (4099), Mar. 26, 1990 (2-14578).
Patent Abstracts of Japan, vol. 15, No. 14 (E-1022) (4542), Jan. 11, 1991 (2-263473).

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