High performance multi-mesa field effect transistor

Details High performance multi-mesa field effect transistor High performance multi-mesa field effect transistor

1995-06-07

1997-10-07

Monin, Donald

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257622, 257401, 437234, 437 50, H01L 2978

Patent

active

056751648

ABSTRACT:
A high performance transistor includes mesa structures in a conduction region, favoring corner conduction, together with lightly doped mesa structures and mid-gap gate material also favoring operation in a fully depleted mode. Mesa structures are formed at sub-lithographic size and pitch as recesses or by epitaxial growth together with exposure of a resist by an interference pattern generation with illuminating radiation and multiple exposures using a mask shifted by a sub-lithographic distance. For an NFET, conduction electron and hole distribution profiles in the mesa structures and gate capacitance are adjusted with dielectric thickness, including deposition of oxide from a liquid solution at room temperature. Transconductance may be altered by change of the aspect ratio of the mesa structures. Lightly doped drain structures are also formed at sub-lithographic sizes by self-aligned processes.

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