Semiconductor memory apparatus having a plurality of word line d

Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator

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365222, 36523003, 36523006, G11C 700, G11C 800

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active

055110274

ABSTRACT:
According to this invention, word line drive circuits are respectively connected to memory cell arrays. These memory cell arrays are respectively driven by the word line drive circuits. Therefore, the potential of a normal word line selected simultaneously with a word line in which a failure has occurred and which is included in a memory cell array can be prevented from being decreased so as to prevent the normal word line from the failure. For this reason, the yield can be increased without unnecessarily using a redundancy circuit.

REFERENCES:
patent: 4933907 (1990-06-01), Kumanoya et al.
patent: 5010259 (1991-04-01), Inoue et al.
patent: 5287312 (1994-02-01), Okamura et al.
patent: 5311476 (1994-05-01), Kajimoto et al.
patent: 5335205 (1994-08-01), Ogihara
patent: 5373475 (1994-12-01), Nagase

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