Method for improving the planarization of inter-poly dielectric

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

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438663, 438632, H01L 21469

Patent

active

059240075

ABSTRACT:
A method of improving the planarization of inter-poly dielectric layers. On a semiconductor device on which a poly-silicon layer is formed, by using atmosphere chemical vapor deposition, an undoped inter-poly dielectric layer is formed. A doped inter-poly dielectric layer is formed on the undoped inter-poly dielectric layer. Under a high temperature, reflow and etching back operations are performed for the doped inter-poly dielectric layer. Before a second poly-silicon layer is formed, a rapid thermal process is performed.

REFERENCES:
patent: 5409858 (1995-04-01), Thakur et al.
patent: 5474955 (1995-12-01), Thakur
patent: 5646075 (1997-07-01), Thakur et al.

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