Method for forming residue free patterned polysilicon layer cont

Details Method for forming residue free patterned polysilicon layer cont Method for forming residue free patterned polysilicon layer cont

1997-09-19

1999-07-13

Niebling, John F.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

438738, 438963, H01L 213205

Patent

active

059240008

ABSTRACT:
A method for forming a patterned polysilicon layer employed within an integrated circuit structure. There is first provided a semiconductor substrate having formed thereupon a topographic substrate layer. There is then formed over the semiconductor substrate including the topographic substrate layer a polysilicon layer. There is then formed over the polysilicon layer an etch mask layer. There is then etched the polysilicon layer within a first reactive ion etch (RIE) plasma employing a first etchant gas composition which comprises a chlorine containing etchant species to form a patterned polysilicon layer and a patterned polysilicon containing layer residue. Finally, there is then over-etched the patterned polysilicon layer and the patterned polysilicon containing layer residue within a second reactive ion etch (RIE) plasma employing a second etchant gas composition which comprises an oxygen containing etchant species and a bromine containing etchant species. The patterned polysilicon layer is formed while etching the patterned polysilicon containing layer residue from over the topographic substrate layer.

REFERENCES:
patent: 5021121 (1991-06-01), Groechel et al.
patent: 5188980 (1993-02-01), Lai
patent: 5346586 (1994-09-01), Keller
patent: 5378659 (1995-01-01), Roman et al.
patent: 5660681 (1997-08-01), Fukuda et al.

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