Error correction in a digital transmission system

Details Error correction in a digital transmission system Error correction in a digital transmission system

1997-06-05

1999-07-13

Baker, Stephen M.

Excavating

371 3702, 371 3707, 371 381, H03M 1300

Patent

active

059236809

ABSTRACT:
Random bit errors in a digital transmission system in which data is scrambled and subsequently descrambled are detected by parsing the descrambled data into words, determining a syndrome error word for each data word, and determining a parity error word for each data word. A data word is left uncorrected when its corresponding syndrome error and parity error words are both zero. Single bit error correction of a data word is effected when its corresponding syndrome error and parity error words are both non-zero. Double or multiple bit error correction of a data word is effected when its corresponding parity error word is zero and its corresponding syndrome error word is non-zero.

REFERENCES:
patent: 3771126 (1973-11-01), Apple, Jr.
patent: 3775746 (1973-11-01), Boudreau et al.
patent: 4435807 (1982-03-01), Scott et al.
patent: 4592054 (1986-05-01), Namekawa et al.
patent: 5179560 (1993-01-01), Yamagishi et al.
Dravida, "Error Control Aspects of High Speed Networks", INFOCOM '92, pp. 272-281, Dec. 1992.

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