Multi-bit memory cell array of a non-volatile semiconductor memo

Details Multi-bit memory cell array of a non-volatile semiconductor memo Multi-bit memory cell array of a non-volatile semiconductor memo

1997-09-18

1999-07-13

Nelms, David

Static information storage and retrieval

Floating gate

Particular connection

36518513, 36518517, G11C 1604

Patent

active

059235870

ABSTRACT:
A memory cell array of a non-volatile semiconductor memory device includes unit strings grouped into first strings belonging to a first string group and second strings belonging to a second string group. Each unit string has a memory cells for storing data in a non-volatile state. Each first string is coupled between an associated bit line of a first bit line group and a first common source line whereas each second string is coupled between an associated bit line of a second bit line group and a second common source line. The bit lines and the common source lines are made of different conductive layers. In accordance with the invention, it is possible to achieve a less critical layout of sense amplifiers coupled to bit lines while easily performing a photolithography process as required in the manufacture of the memory device.

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