Semiconductor die having sacrificial bond pads for die test

Active solid-state devices (e.g. – transistors – solid-state diode – Test or calibration structure

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Details

257784, 257786, 257620, H01L 2160, H01L 2166

Patent

active

059230479

ABSTRACT:
The testing of integrated circuits in a plurality of dice arranged in rows and columns in a semiconductor wafer is facilitated by effectively increasing the pitch between adjacent input/output bonding pads on each die by providing a plurality of test pads in scribing space between adjacent die. Alternate test pads are connected with alternate bonding pads on adjacent die, thereby effectively increasing the pitch of adjacent die for testing. After the integrated circuits are tested and defective circuits are marked, the wafer is scribed in the scribe space and broken to recover the individual die or integrated circuit chips.

REFERENCES:
patent: 5003374 (1991-03-01), Vokoun, III
patent: 5047711 (1991-09-01), Smith et al.
patent: 5285082 (1994-02-01), Axer
patent: 5684304 (1997-11-01), Smears

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