Methods of repairing field-effect memory cells in an electricall

Details Methods of repairing field-effect memory cells in an electricall Methods of repairing field-effect memory cells in an electricall

1991-12-30

1993-08-03

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Erase

365185, 365201, G11C 1140

Patent

active

052335623

ABSTRACT:
A method of reprogramming field-effect memory cells of a memory array of an electrically erasable flash memory device is described. Each cell has a drain, a source, and a control gate. The drains of the cells are electrically connected to a bit line of the memory array. The cells are programmed and erased. The cells are repaired by grounding the sources and the control gates and taking the bit line to a predetermined potential. The memory array is selectively programmed. Other embodiments include repairing field-effect memory cells connected to a source line or part of a word line. Verification may be done between the repair step and selectively programming step.

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Yamada, et al., "A Self-Convergence Erasing Scheme for a Simple Stacked Gate EEPROM"; IEDM; pp. 307-310 (1991).

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