Semiconductor memory device capable of directly reading the pote

Details Semiconductor memory device capable of directly reading the pote Semiconductor memory device capable of directly reading the pote

1991-12-12

1993-08-03

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

36518902, 365203, 365207, G11C 1300

Patent

active

052335585

ABSTRACT:
Memory cell arrays containing dynamic memory cells and write/read circuits for these memory cell arrays are arranged alternately. In the write/read circuit, read amplifiers are provided at a rate of one for every four columns (bit line pairs). This read amplifier is composed of a preamplifier and a main amplifier. Each column is provided with a multiplexer, which selects a column and connects it to the preamplifier of a read amplifier. The signal amplified by this preamplifier is supplied to the main amplifier. The current-mirror load circuit of this main amplifier is in common use by a plurality of read amplifiers.

REFERENCES:
patent: 4780852 (1988-10-01), Kajigawa et al.
patent: 4954992 (1990-09-01), Kumanoya et al.
patent: 4970688 (1990-11-01), Minagawa et al.
patent: 4984206 (1991-01-01), Komatsu et al.
patent: 5014246 (1991-05-01), Komatsu et al.
patent: 5138578 (1992-08-01), Fujii

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