Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1995-06-13
1997-09-30
Crane, Sara W.
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257392, 257393, 257504, 257506, H01L 2976, H01L 2994, H01L 31062, H01L 31113
Patent
active
056728999
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF INVENTION
1. Field of the Invention
The present invention relates to the field of power semiconductor switches.
2. Description of the Background Art
The invention relates to a semiconductor arrangement according to the preamble of the claims, in which a vertical power semiconductor component, e.g. a D-MOS transistor, an IGBT, a thyristor or similar is monolithically integrated, together with a circuit which serves, for example, to drive or protect the component, in a switching circuit. Such components, which play an increasingly important role in many appliances in the field of power electronics, are called smart-power elements.
SUMMARY OF THE INVENTION
In accordance with the present invention, a semiconductor arrangement with a vertical power semiconductor switch and an integrated CMOS or bipolar circuit is provided, whereby the integrated CMOS or bipolar circuit is arranged on a semiconductor islet insulated from a first semiconductor material region by a buried insulating layer. The first semiconductor material region is included as a part of the structure of the power semiconductor switch. The buried insulating layer is surrounded by a second semiconductor material region arranged between it and the first semiconductor material region, the doping of which is the opposite of that of the first semiconductor material region. The second semiconductor region is coupled to the first semiconductor region by a circuit. This circuit does not directly connect the potential of the second semiconductor material region with the potential of the first semiconductor material region. The circuit limits the potential of the second semiconductor material region to values smaller than those capable of influencing the integrated circuit.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a schematic view of a semiconductor arrangement in accordance with one embodiment; and
FIG. 2 is a schematic view of a semiconductor arrangement in accordance with another embodiment.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
In the smart-power element described here, the switching circuit is electrically separated from the power semiconductor by a dielectric insulation generated, for example, by SIMOX. At approx. 400 nm, the thicknesses of the insulation which can be achieved are typically so low that the potentials of the power semiconductor interfere severely with the circuit. The interferences are so serious that until now, it has not been possible to usefully use such semiconductor components, particularly in high-voltage applications (mains applications).
A shield under the region to be protected may be considered an obvious solution to this problem. Such shields are often used in semiconductor arrangements, either to be used themselves reverse-biased as an insulating element (junction insulation) or, as in JP-OS SHO 60-100469, to prevent the influence of the back-gate effect. However, in smart-power applications this proposition has a decisive disadvantage, which prevents the protection from functioning. The diode region of the shield, the shield being directly connected with the source or emitter region of the power semiconductor, can be conductive and thereby flooded in this respect with charge carriers. If the component subsequently switches off, the charge carriers have to recombine. For the recombination time the shield is therefore a low-resistance connection to the vertical power component. The conductivity of the shield is not sufficient to guarantee an effective protection for the electronic circuit.
The invention is therefore based on the task of creating a semiconductor arrangement which makes it possible, on the same substrate of a vertical power semiconductor, safely to protect the circuit to be insulated from interference even when the component is operated in reverse, when the shield is normally flooded with charge carriers.
The invention succeeds in solving the task with little additional expenditure. For this purpose, the semiconductor element consists of a vertical power semiconductor swit
REFERENCES:
patent: 5040043 (1991-08-01), Ohno
patent: 5045900 (1991-09-01), Tamagawa
Crane Sara W.
Hanning Electronic GmbH & Co.
Wille Douglas
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