Static information storage and retrieval – Read/write circuit
Patent
1991-03-27
1994-06-21
Gossage, Glenn
Static information storage and retrieval
Read/write circuit
365205, 365207, 365208, 307530, G11C 706, G11C 11407, H03F 345
Patent
active
053233450
ABSTRACT:
A dynamic type semiconductor memory device is disclosed which includes a plurality of memory cells, plural pairs of bit lines for supplying data to the plurality of memory cells, a first sense amplifier arranged for each of the plural pairs of bit lines, for amplifying a bit line signal, a pair of data input/output lines consisting of first and second data input/output lines, for extracting data from the plural pairs of bit lines, a second sense amplifier arranged for each of the plural pairs of bit lines and consisting of first and second driver MOS transistors for extracting charges from the data input/output lines in a data reading operation, and for amplifying a data input/output line signal, first and second column selecting transistors which are inserted between the pair of data input/output lines and the second sense amplifier and gates of which are connected to a column selecting line, and first and second write transistors, the first and second write transistors being turned on in a data writing operation.
REFERENCES:
patent: 4954992 (1990-09-01), Kumanoya et al.
patent: 5027325 (1991-06-01), Katsura
patent: 5132930 (1992-07-01), Furutani et al.
patent: 5146427 (1992-09-01), Sasaki et al.
Gossage Glenn
Kabushiki Kaisha Toshiba
Lane Jack A.
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