Semiconductor memory device adapted for large capacity and high-

Static information storage and retrieval – Addressing – Plural blocks or banks

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365 63, G11C 800

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06115315&

ABSTRACT:
A semiconductor memory device includes a first memory cell consisting of a single-gate transistor and a stacked-gate transistor and a second memory cell consisting of a stacked-gate transistor, and is constructed such that a memory cell array composed of the first memory cells and a memory cell array composed of the second memory cells share peripheral circuits.

REFERENCES:
patent: 5629898 (1997-05-01), Idei et al.
patent: 5663905 (1997-09-01), Matsuo et al.
patent: 5808948 (1998-09-01), Kim et al.
patent: 5848006 (1998-12-01), Nagata

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