Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1998-05-18
2000-06-06
Chaudhuri, Olik
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
438659, 257757, H01L 21425
Patent
active
060722223
ABSTRACT:
An integrated circuit fabrication process is provided for implanting silicon into select areas of a refractory metal to reduce the consumption of silicon-based junctions underlying those select areas during salicide formation. The refractory metal is subjected to a heat cycle to form salicide upon the junctions and polycide upon the upper surface of a gate conductor positioned between the junctions. In response to being heated, the metal atoms readily react with implanted silicon atoms positioned proximate the metal atoms to form salicide. Once a metal atom has reacted with implanted silicon atoms, it is no longer available to react with silicon atoms of the junctions. However, not all of the metal atoms react with implanted silicon atoms, so some of the metal atoms are free to react with the silicon atoms of the junctions. Interdiffusion and reaction between those available metal atoms and those silicon atoms of the junctions occurs as a result of heating the semiconductor topography. The junctions thus may be partially consumed, ensuring that a low resistance pathway is formed between the salicide and the junctions. Advantageously, the remaining portions of the junctions are sufficiently large to prevent junction spiking entirely through the junctions to the bulk substrate underlying the junctions. In fact, so little of the junctions are consumed during salicide formation that the junction depth may be minimized without suffering increased junction leakage due to junction spiking.
REFERENCES:
patent: 4120700 (1978-10-01), Morimoto
patent: 4559096 (1985-12-01), Friedman et al.
patent: 4743564 (1988-05-01), Sato et al.
patent: 4929489 (1990-05-01), Dreschhoff et al.
patent: 5070046 (1991-12-01), Hu
patent: 5111355 (1992-05-01), Anand et al.
patent: 5142438 (1992-08-01), Reinberg et al.
patent: 5186718 (1993-02-01), Tepman et al.
patent: 5246884 (1993-09-01), Jaso et al.
patent: 5281554 (1994-01-01), Shimada et al.
patent: 5304503 (1994-04-01), Yoon et al.
patent: 5552337 (1996-09-01), Kwon et al.
patent: 5677015 (1997-10-01), Hasegawa
Yamada et al. "Gas Cluster Ion Beam Processing for ULSI Fabrication," Reprinted from MatErials Research Society Symposium Proceedings vol. 427, Advanced Metallization for Future ULSI.
RaaijamAkers "Low Temperature Metal--Organic Chemical Vapor Deposition of Advanced Barrier Layers for the Microelectronics Industry," Thin Solid Films, 247 (1994) pp. 85-93.
Huang, et al, "The Influence of Ge-Implantation on the Electrical Characteristics of the Ultra-Shallow Junction Formed by Using Silicide as a Diffusion Source," IEEE Electron Device Letters, vol. 17, No. 3, Mar. 1996, pp. 88-90.
Advanced Micro Devices , Inc.
Chaudhuri Olik
Daffer Kevin L.
Duy Mai Anh
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