Method and circuit for shortcircuiting data transfer lines and s

Details Method and circuit for shortcircuiting data transfer lines and s Method and circuit for shortcircuiting data transfer lines and s

1999-04-28

2000-09-05

Mai, Son

Static information storage and retrieval

Read/write circuit

365203, 365204, G11C 700

Patent

active

RE0368512

ABSTRACT:
There is provided a method of controlling data transmission lines of a semiconductor memory device which has a first pair of data transmission lines to which a sense amplifier and memory cells are connected, and a second pair of data transmission lines to which a read circuit and a write circuit are connected at an end of the second pair of the data transmission lines, which is connected to the first pair of data transmission lines via a column gate. The method includes a) shortcircuiting the second pair of data transmission lines for a first period when a read operation is carried out, and b) shortcircuiting the second pair of data transmission lines for a second period when a write operation is carried out, the second period being shorter than the first period.

REFERENCES:
patent: 4996671 (1991-02-01), Suzuki et al.
patent: 5313434 (1994-05-01), Abe
patent: 5321657 (1994-06-01), Arimoto et al.
patent: 5487043 (1996-01-01), Furutani et al.
patent: 5734619 (1998-03-01), Numata et al.

Affiliated with

Also associated with

Rating

Method and circuit for shortcircuiting data transfer lines and s does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and circuit for shortcircuiting data transfer lines and s, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and circuit for shortcircuiting data transfer lines and s will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2199161