Memory circuit with means for compensating for inversion of stor

Details Memory circuit with means for compensating for inversion of stor Memory circuit with means for compensating for inversion of stor

1980-04-29

1982-06-29

Konick, Bernard

Static information storage and retrieval

Read/write circuit

For complementary information

365228, G11C 700

Patent

active

043375227

ABSTRACT:
Information stored in a reference cell is inverted when the information stored in a memory cell is inverted. The memory cell information is derived from a first Exclusive OR gate receptive of an input data signal and the reference cell output signal. Information is read out of the memory cell via a second Exclusive-OR gate receptive of the output of the memory cell and the output of the reference cell. Regardless of any inversion within the memory cell, the signal produced at the output of the second Exclusive OR gate is of the same binary significance as the input data applied to the first Exclusive-OR gate.

REFERENCES:
patent: 3922647 (1975-11-01), Broeker, Jr.
patent: 4095281 (1978-06-01), Denes

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