Dynamic random access memory device incorporating transfer gates

Static information storage and retrieval – Read/write circuit – Data refresh

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365207, G11C 700

Patent

active

054187532

ABSTRACT:
A transfer gate unit incorporated in a dynamic random access memory device blocks sense amplifier circuits from associated bit line pairs for decreasing the load of the sense amplifier circuits, and conducts the sense amplifier circuits with the bit line pairs again upon completion of the sense amplification for restoring the data bits in a standard read-out cycle; however, the transfer gate unit keeps the conductive paths between the sense amplifier circuits and the bit line pairs during a refreshing cycle so as to decrease current consumption due to the charge and discharge of the signal line coupled with the transfer gate unit.

REFERENCES:
patent: 5208779 (1993-05-01), Walther et al.
patent: 5270982 (1993-12-01), Watanabe
patent: 5299168 (1994-03-01), Kang

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