Enhanced low voltage TTL interface

Details Enhanced low voltage TTL interface Enhanced low voltage TTL interface

1997-12-09

1999-11-02

Santamauro, Jon

Electronic digital logic circuitry

Interface

Logic level shifting

326 17, 326 23, 326 80, H03K 190175, H03K 190944

Patent

active

059777958

ABSTRACT:
A differential transistor pair is used for a Low Voltage Transistor-Transistor Logic (LVTTL) input buffer to provide an input buffer for a modified and enhanced LVTTL specification. The differential input buffer accurately detects high and low voltages which are respectively lower and higher than existing specified LVTTL voltage levels, yet provides output voltages that are representative of intended logic levels. This provides the ability to use the improved input buffer with existing drivers at higher frequencies where the voltage swing provided by the existing drivers do not produce as large a voltage swing as that required by existing LVTTL specifications.

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Mano, M. Morris. "Computer Engineering: Hardware Design". Prentice Hall. pp. 122-132, 418-419, 1988.

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