Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1997-04-22
1999-11-02
Niebling, John F.
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438129, 438598, 438599, H01L 2144
Patent
active
059769742
ABSTRACT:
In a method for forming redundant signal traces and corresponding electronic components, a photoresist pattern which defines a semi-additive signal image is coated on at least one first conductive layer of a composite base substrate. A barrier layer of etch-resistant metal is deposited on the first conductive layer. The photoresist is removed, thereby forming a first barrier signal trace having a first line width. Optionally, one or more vias may be formed in the substrate. A surface conductive layer is deposited on the first conductive layer, the barrier layer, and on a surface of the optional vias. A photoresist pattern is coated on the surface conductive layer which defines a subtractive signal image. Predetermined portions of the surface conductive layer and the first conductive layer are removed. The photoresist is removed forming a second signal trace in overlying relationship with the first barrier signal trace and having a second line width greater than the first line width.
REFERENCES:
patent: 4964212 (1990-10-01), Deroux-Dauphin et al.
patent: 4978639 (1990-12-01), Hua et al.
patent: 5106461 (1992-04-01), Volfson et al.
Tummala, R. et al. editors, Microelectronics Packaging Handbook, Semiconductor Packaging, Part II, Second Edition, pp. II-63, II-64, and II-117 (1997).
Fischer Paul J.
Gorrell Robin E.
Genco, Jr. Victor M.
Gurley Lynne A.
Niebling John F.
W. L. Gore & Associates, Inc.
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