Self-refresh control circuit for dynamic semiconductor memory de

Static information storage and retrieval – Read/write circuit – Data refresh

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G11C 700

Patent

active

046823069

ABSTRACT:
A self-refresh control circuit for a dynamic memory device having memory cells and a self-refresh circuit on a single chip. The circuit includes a leak current monitor circuit representing the leakage of a memory cell and an inverter circuit for detecting the leakage of the monitor circuit so as to control the refresh operation automatically.

REFERENCES:
patent: 4491938 (1985-01-01), Leach
Kawamoto et al., "A 288Kb CMOS Pseudo SRAM", IEEE International Solid-State Circuits Conference, pp. 276-277, Feb. 24, 1984.

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