Semiconductor device including leadless packages and a base plat

Electricity: conductors and insulators – Feedthrough or bushing – Compression

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174 52FP, 361413, H01L 2332

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active

046822070

ABSTRACT:
A semiconductor device includes a plurality of leadless packages and a base plate for mounting the leadless packages. The leadless packages include a semiconductor chip housed therein and a plurality of electrodes formed on the surface thereof. The base plate has conductor patterns formed on both of two main surfaces thereof, and the electrodes of each leadless package are soldered to the conductor patterns. The base plate also has a plurality of lead pins which project from one edge thereof in parallel with the main surface.

REFERENCES:
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patent: 4271426 (1981-06-01), Hargis
patent: 4423468 (1983-12-01), Gatto et al.
patent: 4426773 (1984-01-01), Hargis
patent: 4493145 (1985-01-01), Honda
IBM Technical Disclosure Bulletin, Henle, R. A., "Vertical Chip Packaging", vol. 20, No. 11A, pp. 4339, 4340, (Apr. 1978).
Engineered Electronics Company, Micro System, Jan. 1966.
P. F. Iafrate, "High Density and Speed Performance Chip Joining Procedure and Package", 9/1972, IBM Technical Disclosure Bulletin, vol. 15, No. 4.
Electronic Design, vol. 29, No. 12, Jun. 1981, "Packaging Struggles to Cover the Spread of VLSI with New Chip Carriers", Waseca, pp. 189-194.
Electronics International, vol. 55, No. 2, Jan. 1982, "Rectangular Chip-Carriers Double Memory-Board Density", Woodruff, pp. 119-123.
Wescon Conference Records, Sep. 1977, "Ceramic Chip Carrier-The New Standard in Packaging?", Burch et al., pp. 1-7.
Funkschau, vol. 57, No. 20, 1979, "ICs fur Nf-Leistungsverstarker", Sax, pp. 1145-1147.
Patent Abstracts of Japan, vol. 6, No. 95.

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