Method of fabricating a capacitor over a bit line DRAM process

Details Method of fabricating a capacitor over a bit line DRAM process Method of fabricating a capacitor over a bit line DRAM process

1996-12-20

1997-11-25

Tsai, Jey

Fishing, trapping, and vermin destroying

437 60, 437919, 437950, 437931, H01L 218242

Patent

active

056912234

ABSTRACT:
The present invention relates to a method of forming a capacitor over a bit line. A thick field oxide (FOX) region is formed to provide isolation between devices on the substrate. Next, a silicon dioxide layer is created on the top surface of the substrate to serve as the gate oxide for isolation. A doped polysilicon layer is then formed over the FOX region and the silicon dioxide layer. Next, a photolithography and an etching steps are used to form a gate structure and a word line. An undoped polysilicon layer is formed on the gate structure, the word line and the substrate. An ion implantation is used through the source/drain masking to form the source/drain. A tungsten silicon (WSi.sub.x) layer is subsequently deposited on the surface of the polysilicon layer for increasing conductivity of the polysilicon layer. Subsequently, an etching process is used to creat a bit line and intermediate interconnections. A first dielectric layer is deposited on the gate structure, the bit line and the intermediate interconnections. Then a photoresist is patterning on the first dielectric layer. Then an etching process is used to etching the first dielectric layer. A capacitor is then formed on the first dielectric layer.

REFERENCES:
patent: 5248628 (1993-09-01), Okabe et al.
patent: 5432116 (1995-07-01), Keum et al.
patent: 5460999 (1995-10-01), Hong et al.

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