Semiconductor device and method of fabricating same

Details Semiconductor device and method of fabricating same Semiconductor device and method of fabricating same

1997-11-05

2000-09-26

Thomas, Tom

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257378, 257903, 257904, H01L 31119, H01L 2711

Patent

active

061246174

ABSTRACT:
An N-type buried diffusion layer as a portion of the collector region of a bipolar transistor and an N-type buried diffusion layer of a memory cell region are simultaneously formed, and the buried diffusion layer of the memory cell region serves as a potential groove for electrons. The threshold voltage of a MOS transistor in the memory cell region is higher than the threshold voltage of a MOS transistor in a peripheral circuit region, preventing an increase in the standby current in the memory cell region. This increases the soft error resistance of the memory cell and prevents a decrease in the operating speed and an increase in the consumption power.

REFERENCES:
patent: 5148255 (1992-09-01), Nakazato et al.

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