Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent
1998-04-17
2000-10-31
Iqbal, Nadeem
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
713202, G06F 1100
Patent
active
061417742
ABSTRACT:
An integrated peripheral device comprises an associated register. The register comprises a data area containing a password. The register is connected to a read/write control unit, which generates an enabling signal after a first access which allows a data word to be written to the register during a following second write access. The read/write control unit comprises a comparator which compares data transmitted to the peripheral device during a first access with the password and generates a comparison signal, the read/write control unit only generates the enabling signal if the comparator generates a predefined comparison signal, for example, an equality signal.
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Infineon Technologies North America Corp.
Iqbal Nadeem
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