Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1999-07-01
2000-11-14
Dang, Trung
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
438437, 438424, 148DIG50, H01L 2176
Patent
active
061469742
ABSTRACT:
A method of fabricating shallow trench isolation (STI) forms a trench in a substrate and a liner oxide layer in the trench. A first high density plasma chemical vapor deposition (HDPCVD) is performed to form a conformal oxide layer on the liner oxide layer, without applying bias to the substrate. A second HDPCVD is then performed to form an oxide layer that fills the trench and covers the conformal oxide layer on the conformal oxide layer.
REFERENCES:
patent: 5915190 (1999-06-01), Pirkle
patent: 5968610 (1999-10-01), Liu et al.
patent: 5989978 (1999-11-01), Peidous
Liu Chih-Chien
Tsai Cheng-Yuan
Wu Juan-Yuan
Yang Gwo-Shii
Dang Trung
United Microelectronics Corp.
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