Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1996-02-12
1999-02-16
Bowers, Jr., Charles L.
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438624, H01L 21316
Patent
active
058720529
ABSTRACT:
A planarization process for filling spaces between patterned metal features formed over a surface of a semiconductor substrate. The patterned metal features are preferably coated with a dielectric barrier. The dielectric barrier is coated with an material that expands during oxidation or nitridization to a thickness about half the depth of the space between metallized features. The layer is then plasma oxidized using an RF or ECR plasma at low temperature with an oxygen ambient. Alternatively, the layer is plasma nitridized at low temperature. The plasma oxidation or nitridization is continued until the expandable material is converted to a dielectric and has expanded to fill the space between patterned metal features. Optionally, the process can be followed by a mechanical or chemical mechanical planarization step.
REFERENCES:
patent: 4323589 (1982-04-01), Ray et al.
patent: 4408387 (1983-10-01), Kiriseko
patent: 4527325 (1985-07-01), Geipel, Jr. et al.
patent: 4576829 (1986-03-01), Kaganowicz et al.
patent: 4604304 (1986-08-01), Faraone et al.
patent: 5026665 (1991-06-01), Zdebel
patent: 5043224 (1991-08-01), Jaccodine et al.
patent: 5182221 (1993-01-01), Sato
patent: 5310720 (1994-05-01), Shin et al.
patent: 5330935 (1994-07-01), Dobuzinsky et al.
patent: 5384288 (1995-01-01), Ying
patent: 5387539 (1995-02-01), Yang et al.
patent: 5391508 (1995-02-01), Matsuoka et al.
patent: 5438016 (1995-08-01), Figura et al.
patent: 5466637 (1995-11-01), Kim
patent: 5472904 (1995-12-01), Figura et al.
patent: 5508209 (1996-04-01), Zhang et al.
patent: 5567638 (1996-10-01), Lin et al.
El-Kareh, Badih, Fundamentals of Semiconductor Processing Technology, Kluwer Academic Publishers, Boston, (1995) pp. 128-129.
Bowers Jr. Charles L.
Micro)n Technology, Inc.
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