Refresh period automatic detecting device for semiconductor memo

Static information storage and retrieval – Read/write circuit – Data refresh

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Details

365226, 36518907, G11C 700

Patent

active

061412805

ABSTRACT:
A refresh period automatic detecting device for a semiconductor memory device including a power-up detector unit detecting power applied from a system; a control unit producing a read/write timing control signal for internal data and at least one control signal to control the overall components of the device in response to an output signal of the power-up detector unit; an internal data generator unit producing internal data in response to the control signal; a comparator unit comparing the internal data with internal data stored in a cell; and a refresh circuit unit determining and storing a refresh period from the time relationship between the read/write timing control signal by the control signal of the control unit if the two data do not correspond to each other.

REFERENCES:
patent: 4542454 (1985-09-01), Brcich et al.
patent: 4694454 (1987-09-01), Matsuura
patent: 5299168 (1994-03-01), Kang
patent: 5566121 (1996-10-01), Hadderman et al.
patent: 5875143 (1999-02-01), Ben-Zvi

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