Subsettable top level cache

Details Subsettable top level cache Subsettable top level cache

1996-10-17

2000-07-18

Chan, Eddie P.

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

G06F 1212

Patent

active

060921536

ABSTRACT:
As computers execute faster relative to memory, they require more memory bandwidth. Improved memory bandwidth can be achieved by having the compiler group contiguous memory requests. The contiguous words are called packs. The basic working premise of the subsettable pack cache is to load a pack into a subset of the cache, make the pack accessable to the processor indirectly through an auto-increment pointer, and to load anything else into the subset until the processor is finished with the pack. The auto-increment pointers are redirectable relative to the pack's begin point in the cache, a pack can begin anywhere within a block. Block parallel transfers between the top level subsettable cache and the next level down memory improve the cache bandwidth. Thrashing is reduced by using cache subsetting to separate cache uses. Cache like behavior within subsets is provided.

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