Synchronous burst semiconductor memory device with parallel inpu

Details Synchronous burst semiconductor memory device with parallel inpu Synchronous burst semiconductor memory device with parallel inpu

1998-08-20

2000-07-18

Mai, Son

Static information storage and retrieval

Addressing

Sync/clocking

3652385, G11C 800

Patent

active

06091663&

ABSTRACT:
A synchronous burst semiconductor memory device operating in synchronism with at least one external clock signal and capable of accessing data on every edge of the external clock signal is provided. The burst memory device includes a clock generator for generating a number of data output/input strobe clock signals synchronized with the external clock signal in response to a plurality of input information signals, and a data-out/in buffer for outputting/inputting internal/external data in synchronism with the data output/input strobe clock signals.

REFERENCES:
patent: 5327390 (1994-07-01), Takasugi
patent: 5402389 (1995-03-01), Flannagan et al.
patent: 5668773 (1997-09-01), Zagar et al.
patent: 5726950 (1998-03-01), Okamoto et al.
patent: 5740121 (1998-04-01), Suzuki et al.

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