Vertical-walled contacts for VLSI semiconductor devices

Details Vertical-walled contacts for VLSI semiconductor devices Vertical-walled contacts for VLSI semiconductor devices

1987-08-03

1991-04-09

Hille, Rolf

357 71, H01L 2354, H01L 2348

Patent

active

050069160

ABSTRACT:
A contact and interconnect for an MOS VLSI semiconductor device employs a contact hole in an insulator coating; the contact hole has vertical instead of sloped sidewalls. A first metallization is applied by CVD so that the sidewalls will be coated to a uniform thickness, then this first metal is anisotropicalloy etched to leave metal sidewalls. A second metallization is applied by sputtering or evaporation, which provides a more dense and electromigration-resistant coating. A refractory metal layer may be interposed between the metallization and the silicon substrate, and also between the metal interconnect and the insulator, since the insulator usually contains phosphorus.

REFERENCES:
patent: 4201999 (1980-05-01), Howard et al.
patent: 4471376 (1984-09-01), Morcom et al.
patent: 4507853 (1985-04-01), McDavid
patent: 4514751 (1985-04-01), Bhattachary
patent: 4589196 (1986-05-01), Anderson
patent: 4698125 (1987-10-01), Rhodes

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