Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Patent
1996-02-08
1997-12-30
Chaudhari, Chandra
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
438254, H01L 2120, H01L 218242
Patent
active
057029890
ABSTRACT:
The present invention provides a method of manufacturing a tub structured stacked capacitor having a central column for a dynamic random access memory (DRAM). The method uses only two photo masks to form the capacitor and a chemical mechanical polishing process to eliminate capacitor dielectric integrity problems. A first insulating layer having a contact opening is formed on a substrate. A first polysilicon layer is formed over the first insulation layer and fills the contact hole with polysilicon. Next, the first polysilicon layer over the first insulation layer is chemically mechanically polished to a depth that at least exposes the first insulation layer thereby forming a central vertical extension. An annular trench is formed in the insulating layer surrounding the central vertical extension. A second polysilicon layer and an oxide layer are formed over the trench, the central vertical extension, and the insulation layer. The oxide layer and the second polysilicon layer are then chemically mechanically polished to a depth that at least exposes the first insulation layer thereby forming a storage electrode. A capacitor dielectric layer and a top electrode are sequentially formed over the at least the storage electrode thereby forming a tub structured stacked capacitor having a central column.
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Liang Mong-Song
Wang Chen-Jong
Ackerman Stephen B.
Chaudhari Chandra
Saile George O.
Taiwan Semiconductor Manufacturing Company , Ltd.
Thomas Toniae M.
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