Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Patent
1994-11-16
1996-11-05
Brown, Peter Toby
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
257763, 257764, 257765, 257915, H01L 2943, H01L 2941
Patent
active
055720722
ABSTRACT:
The invention relates to a wiring structure for a semiconductor device and a method for manufacturing the same, which fills up a contact hole of below one half micron. An insulating layer is formed on a semiconductor substrate, and a contact hole is formed in the insulating layer. On the insulating layer, a first metal is deposited via a CVD method to form a CVD metal layer or a CVD metal plug filling up the contact hole. Then, the thus-obtained CVD metal layer or the CVD metal plus is heat-treated in a vacuum at a high temperature below the melting point of the first metal, thereby planarizing the surface of the CVD metal layer. A second metal is deposited via a sputtering method on the CVD metal layer or on the CVD metal plug to thereby form a sputtered metal layer. The contact hole is filled up with the first metal by the CVD method and then a reliable sputtered metal layer is deposited via a sputtering method. The wiring layer can be used for semiconductor devices of the next generation.
REFERENCES:
patent: 4910580 (1990-03-01), Kuecher et al.
patent: 4924295 (1990-05-01), Kuecher
patent: 5202579 (1993-04-01), Fujii et al.
patent: 5207868 (1993-05-01), Shinohara
patent: 5360996 (1994-11-01), Nulman et al.
Brown Peter Toby
Samsung Electronics Co,. Ltd.
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