Semiconductor memory device having redundancy circuit with high

Details Semiconductor memory device having redundancy circuit with high Semiconductor memory device having redundancy circuit with high

1998-08-25

2000-08-15

Nelms, David

Static information storage and retrieval

Read/write circuit

Bad bit

36518907, 365 51, G11C 700

Patent

active

061046469

ABSTRACT:
There is disclosed a memory cell array including regular and redundant memory cells, a plurality of bit lines connected to the regular memory cells, a plurality of redundant bit lines connected to the redundant memory cells, a regular data line commonly coupled to the plurality of regular bit lines, and a redundant data line commonly coupled to the plurality of redundant bit lines. Column selection lines include regular column selection lines for selecting regular bit lines, and redundant column selection lines for selecting redundant bit lines. Furthermore, the number of redundant column selection lines is smaller than that of the regular column selection lines.

REFERENCES:
patent: 5295101 (1994-03-01), Stephens, Jr. et al.
patent: 5307316 (1994-04-01), Takemae
patent: 5414660 (1995-05-01), Sugibayashi et al.
patent: 5497347 (1996-03-01), Feng
patent: 5617364 (1997-04-01), Hatakeyama
patent: 5841709 (1998-11-01), McClure

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