Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1984-12-27

1985-08-27

Fears, Terrell W.

Static information storage and retrieval

Systems using particular element

Flip-flop

365154, 357 43, G11C 1140

Patent

active

045382441

ABSTRACT:
A semiconductor memory device in which a bipolar memory cell includes two cross-coupled transistors. The collector load is a Schottky barrier diode. A capacitor is formed to be connected to the Schottky barrier diode. The capacitor is formed by a junction between a P.sup.+ -type diffusion region and an N.sup.+ -type buried layer functioning as a collector of the transistor. The P.sup.+ -type diffusion region is formed in the periphery of the Schottky barrier diode and between a metal layer connected to a word line and the N.sup.+ -type buried layer. By the capacitor, the stability of the memory holding state is improved without deteriorating the operating speed of the memory cell.

REFERENCES:
patent: 4480319 (1984-10-01), Hotta et al.

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