Low leakage current offset-gate thin film transistor structure

Details Low leakage current offset-gate thin film transistor structure Low leakage current offset-gate thin film transistor structure

1991-05-31

1993-05-04

Hille, Rolf

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257 66, 257412, H01L 2976, H01L 2904, H01L 2994

Patent

active

052084760

ABSTRACT:
A thin film transistor structure and methods of manufacture provide high ON/OFF current ratio and significantly reduce OFF state leakage currents. A doped thin film disposed on an insulating substrate is etched to form opposing source and drain regions. An undoped thin film is disposed between the opposing source and drain regions so that there is some overlap of the undoped thin film onto the top sides of the source and drain regions. Conventional photomasking, etching and ion implantation steps are then used to form a gate electrode offset from at least the drain region, and preferably offset from both source and drain regions, as well as conventional insulation and interconnect layers. The reduction in electric field intensity in the drain region, and the reduction in trap state density result from, performing heavy junction doping prior to deposition of the undoped thin film, and offsetting the gate electrode from the drain region. This structure provides very low OFF state leakage current while not seriously affecting the ON current. Several alternative fabrication processes are disclosed.

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patent: 4968638 (1990-11-01), Wright et al.
patent: 5037766 (1991-08-01), Wang
Electron Device Letters, "Laser-Recrystallized Polycrystalline-Silicon Thin-Film Transistors with Low Leakage Current and High Switching Ratio", Shunji Seki, Osamu Kogure, and Bunjiro Tsujiyama, vol. EDL-8 No. 9, Sep. 1987, pp. 425-427.

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