MOS device structure and method for reducing PN junction leakage

Details MOS device structure and method for reducing PN junction leakage MOS device structure and method for reducing PN junction leakage

1998-02-24

2000-10-24

Smith, Matthew

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257372, 257376, H01L 2701, H01L 2704

Patent

active

061371424

ABSTRACT:
To reduce p-n junction leakage at the boundary between lightly doped wells formed in lightly doped bulk materials, a high concentration region is implanted at the junction. The high concentration region contains a relatively high dopant level, and thus reduces the width of the depletion region at the junction. The reduced width of the depletion region in turn reduces junction leakage.

REFERENCES:
patent: 5362981 (1994-11-01), Sato et al.

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