Seed layers for interconnects and methods for fabricating such s

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

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438627, 438652, 438763, 438643, H01L 2144, H01L 214763, H01L 2131, H01L 21469

Patent

active

061367079

ABSTRACT:
One embodiment of the present invention is a method for making metallic interconnects including: (a) forming a patterned insulating layer on a substrate, the patterned insulating layer including at least one opening and a field surrounding the at least one opening; (b) depositing a barrier layer over the field and inside surfaces of the at least one opening; (c) depositing a first seed layer over the barrier layer using a first deposition technique; (d) depositing a second seed layer over the first seed layer using a second deposition technique, the first and second deposition techniques being different; and (e) electroplating a metallic layer over the second seed layer, the electroplated metallic layer including a material selected from a group consisting of Cu, Ag, or alloys including one or more of these metals.

REFERENCES:
patent: 6069068 (2000-05-01), Rathore et al.
patent: 6087711 (2000-07-01), Givens

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