Memory defect detection arrangement

Details Memory defect detection arrangement Memory defect detection arrangement

1994-03-31

1996-03-19

Zarabian, A.

Static information storage and retrieval

Read/write circuit

Testing

365190, G11C 2900

Patent

active

055008232

ABSTRACT:
In a static random access memory made up of six-transistor memory cells arranged in rows and columns, an arrangement for detecting open circuit or "soft" defects in the individual inverters of a memory cell includes lowering the supply voltage of a cell under test to overcome the clamping effect of a feedback inverter, applying input signal voltage changes to one of the bit lines associated with the cell, and testing for the expected voltage changes on the other bit line associated with the cell.

REFERENCES:
patent: 5079744 (1992-01-01), Tobita et al.
patent: 5255230 (1993-10-01), Chan et al.

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