Level converter including wave-shaping circuit and emulator micr

Electronic digital logic circuitry – Multifunctional or programmable – Array

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326 68, 326 33, 326 98, 326 63, 327291, 327134, 327333, G06F 300

Patent

active

055599966

ABSTRACT:
A level converter circuit has first and second P-channel transistors having the same first .beta. values, sources of the first and second P-channel transistors being commonly connected to a first potential V1, drains of the first and second P-channel transistors being connected to gates of the second and first P-channel transistors, respectively; first and second N-channel transistors having the same second .beta. values, the first and second N-channel transistors having drains respectively connected to the drains of the first and second P-channel transistors and sources which are grounded; a first inverter for inverting a level-conversion input signal and supplying the inverted signal to the gate of the second N-channel transistor, the first inverter being operated by a power supply of a second potential V2; a second inverter for inverting the output of the first inverter and supplying the further inverted signal to the gate of the first N-channel transistor, the second inverter being operated by a power supply of the second potential V2; and a wave-shaping device for wave-shaping a signal obtained at the junction of the drain of the first P-channel transistor and the drain of the first N-channel transistor. The second .beta. values of the first and second N-channel transistors are more than 50 times as large as the first .beta. values of the first and second P-channel transistors.

REFERENCES:
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patent: 4572974 (1986-02-01), Frieling et al.
patent: 4740718 (1988-04-01), Matsui
patent: 4837462 (1989-06-01), Watanabe et al.
patent: 4894560 (1990-01-01), Chung
patent: 4926070 (1990-05-01), Tanaka et al.
patent: 4929945 (1990-05-01), Kushiyama
patent: 5099143 (1992-03-01), Arakawa
patent: 5113097 (1992-05-01), Lee
patent: 5225720 (1993-07-01), Kondoh et al.

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