Power FET having reduced threshold voltage

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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Details

257335, 257343, 257345, 257657, H01L 2910

Patent

active

052182207

ABSTRACT:
In a power FET composed of a substrate having upper and lower surfaces and having a semiconductor body of a first conductivity type, the body providing a current flow path between the upper and lower surfaces and having at least one body region which extends to said upper surface; and at least one base region extending into the substrate from the upper surface, the base region being of a second conductivity type opposite to the first conductivity type and having an upper portion located adjacent the upper surface of the substrate and a lower portion separated from the upper surface of the substrate by the upper portion, the upper portion defining a channel which is disposed in the current flow path adjacent the upper surface of the substrate, and the FET further having an insulated gate disposed at the upper surface above the body region, an impurity layer region extends into the channel from the upper surface of the substrate for giving the channel a lower impurity density than the lower portion of the base region.

REFERENCES:
patent: 5055895 (1991-10-01), Akiyama et al.

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