Method for manufacturing a stacked capacitor DRAM semiconductor

Details Method for manufacturing a stacked capacitor DRAM semiconductor Method for manufacturing a stacked capacitor DRAM semiconductor

1991-08-29

1992-12-29

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 47, 437 90, 148DIG14, H01L 2176, H01L 2120

Patent

active

051751216

ABSTRACT:
A method for manufacturing a semiconductor device includes forming contact holes in insulating layers to expose an impurity doped region of a semiconductor substrate. An epitaxial layer is then grown in the contact hole. A polycrystalline silicon layer is formed over the top to provide the lower electrode of a capacitor. Accordingly, the polycrystalline layer is separated from the impurity doped region thereby preventing current leakage.

REFERENCES:
patent: 4578142 (1986-03-01), Corboy et al.
patent: 4700457 (1987-10-01), Matsukawa
patent: 4735915 (1988-04-01), Kita et al.
patent: 4794563 (1988-12-01), Maeda
patent: 4977102 (1990-12-01), Ema
patent: 5045494 (1991-09-01), Choi et al.

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