Nonvolatile semiconductor memory device and a method of writing

Details Nonvolatile semiconductor memory device and a method of writing Nonvolatile semiconductor memory device and a method of writing

1995-12-21

1998-07-14

Monin, Donald

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

36518511, 36518518, G11C 1602, G11C 1604

Patent

active

057808902

ABSTRACT:
A nonvolatile semiconductor memory device includes an array of a plurality of memory cells formed in a semiconductor substrate and arranged in a matrix of columns and rows, word lines each being formed to include control gates of the memory cells arranged in each row, a plurality of bit lines, each being connected to drains of the memory cells arranged in one column, and a plurality of source lines, each being connected to sources of the memory cells arranged in one column; wherein adjacent two memory cells arranged in each row have the source or drain in common; and each of the plurality of bit lines is connected selectively to one of adjacent two main bit or source lines through a switching circuit. Further, a method of writing data in a nonvolatile semiconductor memory device of the above-mentioned type includes the steps of applying a first voltage to the control gate of a first memory cell to be written, a second voltage to the drain thereof and a third voltage lower than the second voltage to the source; applying the second voltage to the source of a second memory cell having its drain in common with the first memory cell; and applying a fourth voltage lower than the second voltage and higher than the third voltage to the drain of a third memory cell having its source in common with the second memory cell and to the source of a fourth memory cell having its drain in common with the third memory cell.

REFERENCES:
patent: 5517448 (1996-05-01), Liu
patent: 5604698 (1997-02-01), Bergemont
patent: 5615152 (1997-03-01), Bergemont
patent: 5633822 (1997-05-01), Campardo et al.
Kume et al., A 1.28um.sup.2 Contactless Memory Cell Technology for a 3V-Only 64 Mbit EEPROM, IEDM 92, pp. 991-993, 1992, IEEE.
NOR Virtual Ground (NVG)-A New Scaling Concept for Very High Density Flash EEPROM, IEDM 93, pp. 15-18, 1993 IEEE.
NIKKEI Micro Devices, Dec. 1993, pp. 128-129.

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