Thin-film transistor having a buried impurity region and method

Details Thin-film transistor having a buried impurity region and method Thin-film transistor having a buried impurity region and method

1997-03-25

1998-02-24

Thomas, Tom

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257349, H01L 2701, H01L 2712

Patent

active

057214441

ABSTRACT:
A buried insulating layer is provided in a semiconductor substrate, in a position separated from its major surface. A LOCOS isolation film is provided in the major surface of the semiconductor substrate for isolating an active region from other active regions. A thin-film transistor is provided in the active region. The thin-film transistor comprises a gate electrode which is provided on the active region with interposition of a gate insulating layer. A pair of source/drain layers are provided in the major surface of the semiconductor substrate on both sides of the gate electrode. A high-concentration impurity layer is provided in the semiconductor substrate immediately under the buried insulating layer.

REFERENCES:
patent: 5138409 (1992-08-01), Kauai
patent: 5294821 (1994-03-01), Iwamatsu
patent: 5359219 (1994-10-01), Hwang
patent: 5440161 (1995-08-01), Iwamatsu et al.
patent: 5488242 (1996-01-01), Tsurura et al.
patent: 5506436 (1996-04-01), Hayashi et al.
A.H. Hamdel et al, Novel SOI CMOS Design Using Ultra Thin Near Intrinsic Substrate, IEDM82, pp. 107-110.

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